EPEPS 2018: San Jose, California
IEEE
Tutorial II
EM Solver Technologies from Chip to System: Challenges and Opportunities

Feng Ling, Xpeedic Technology, Inc.

With the advent of 5G and AI technology, high frequency link and high speed interface are ubiquitous in today’s communication, computing, networking and storage market. This trend poses a great challenge for electromagnetic (EM) simulation on the existing design flow for IC, package and system. At chip level, while Moore’s law keeps driving the device scaling, EM tools for passives have to evolve as well to address the process variation in advanced nodes. While advanced packaging technologies such as 2.5D interposer and TSV are evolved for the need of more bandwidth and performance, EM tools for SI and PI analysis of those packages are lagging behind. At board and system level, multi-gigabit per second high speed links are everywhere.

Quickly building models for every discontinuity in the channel is already challenging enough, not even to mention the post-layout full-board sign-off including SI and crosstalk. Applying state-of-the-art EM solvers to address these problems has become a critical piece in the design flow. For different applications, the design flow and the requirement for EM solvers can be very different. Therefore, developing novel EM algorithms tailored for specific design flow is necessary. The talk will demonstrate the specific requirements for each flow from EM solvers’ perspective and how they drive innovation in Xpeedic’s EM solver development and eventually lead to a successful EDA product.