EPEPS 2018: San Jose, California
IEEE
Tutorial V
High-Speed Link Modeling Using Deep Learning

Arash Zargaran-Yazd and Sunil Sudhakaran, SI Team - NVIDIA

Time-domain, and statistical simulations have been traditionally the methods of choice to determine voltage and time margin in high-speed memory and serial links. As transmitter (TX) and receiver (RX) of high-speed links get more elaborate signal-processing features to tackle signal impairment effects at cutting-edge data rates, the time-domain modelling approach becomes a major part of the sign-off process. There are various non-idealities and transient effects that can only be modeled in time-domain. This in turn calls for models that can accurately represent various circuit blocks. In addition, the time spent to develop such models, and their computation complexity within the time-domain simulator are prominent concerns in industry, where a quick path from architecture change to validation using simulation results is required. In this tutorial, we discuss Deep Neural Networks (DNNs) as an emerging option that can help with these three criteria. We demonstrate examples of modelling commonly used blocks such as equalizers using DNNs. Finally, simulation speedup through parallel processing is discussed.