Special Session
Co-Design Roadmap for Heterogeneous Integration Tuesday, October 21, 2:00 pm - 3:30 pm
Talk 1:

Dan Lambalot,
Senior Principal Engineer
Alphawave Semi

Dan Lambalot is a Senior Principal Engineer with Alphawave Semi and responsible for IC package design for IP development and ASIC. Dan was a cofounder of Bayside Design, a design services company focused on providing IC package design. Dan has designed over 800 high performance IC packages and is presently focused on D2D interface technologies. Dan also held positions at Socionext America and Digital Equipment Corporation. He obtained his MSEE at University of Illinois Urbana-Champaign (2000) and BSEE from Northeastern University (1996) in Boston, MA.

Talk 2:

Ken Willis,
Application Engineer
Cadence Design Systems

Ken Willis is an Application Engineering Group Director focusing on system-level analysis solutions at Cadence Design Systems. He has over 30 years of experience in the modeling, analysis, design, and fabrication of high-speed digital circuits. In addition to Cadence, Ken has held engineering, technical marketing, and management positions with the Tyco Printed Circuit Group, Compaq Computers, Sirocco Systems, Sycamore Networks, and Sigrity.

Talk 3:

Chris Cheng,
Distinguished Technologist
Hewlett-Packard Enterprise

Chris Cheng Chris Cheng is a Distinguished Technologist in Primary Storage Division of Hewlett-Packard Enterprise. He is responsible for managing hardware machine learning development and high-speed design within the Storage Division. He also held senior engineering positions in Sun Microsystems where he developed the original GTL system bus with Bill Gunning. He was a Principal Engineer in Intel where he led high speed processor bus design team. He was the first hardware engineer in 3PAR and guided their high-speed design effort until it was acquired by Hewlett Packard.

Talk 4:

Sandeep Kumar Goel,

TSMC